MSc thesis project proposal
 High Efficiency Buck DC-DC Converter for 48V-to-1V datacenter applications
With the rapid growth of artificial intelligence, devices are becoming more intelligent and power-hungry. High-efficiency and high-power-density dc–dc converters play a more important role in high-performance data centers. To reduce the distribution loss due to the power delivery network of data centers, the 48-V power bus has been proposed in place of the conventional 12-V bus. However, achieving good efficiency and power density has always been a nontrivial task, especially for the 48-1V design, due to its high step-down ratio and large output current. Even a slight efficiency increasement can save the world a significantly amount of energy. For instance, Facebook datacenter consumes 5.1 Terawatt hours energy in 2019, which is 5.1 billion kWh. The main power supply for these datacenters is 48-V supply, which needs to converted to 1 V to power all the processors. If the 48V-to-1V efficiency can be slightly improved by 1%, the saved energy is 51 million kWh per year, only for Facebook, excluding many other IT giants in the world.
Due to the wide voltage conversion ratio from 48V to 1V, achieving high power conversion efficiency (PCE) is extremely challenging. Recent research works have shown ~ 90% efficiency with different topologies and switch-driving techniques . However, there are still many unsolved challenges besides further improving PCE, including form factor, off-chip device count, safety, reliability and startup stability, etc.
In this project, we are going to develop a novel buck converter topology which performs highly efficiency 48V-to-1V conversion. The proposed design will achieve above-90% PCE without minimum off-chip devices and ampere-level output current.
 H. Cao et al., "A 12-Level Series-Capacitor 48-1V DC-DC Converter With On-Chip Switch and GaN Hybrid Power Conversion," IEEE Journal of Solid-State Circuits, pp. 1-1, 2021.
 D. Yan, X. Ke, and D. B. Ma, "Direct 48-/1-V GaN-Based DC–DC Power Converter With Double Step-Down Architecture and Master–Slave AO2T Control," IEEE Journal of Solid-State Circuits, vol. 55, no. 4, pp. 988-998, 2020.
 M. Choi and D. Jeong, "18.6 A 92.8%-Peak-Efficiency 60A 48V-to-1V 3-Level Half-Bridge DC-DC Converter with Balanced Voltage on a Flying Capacitor," in 2020 IEEE International Solid- State Circuits Conference - (ISSCC), 16-20 Feb. 2020.
1. Literature review of 48V-to-1V buck DC-DC converter topologies for data center supply applications and associated power management circuits.
2. Design of a highly efficient CMOS circuit for the proposed buck DC-DC converter system. Tape-out is possible depending on the design and available time.
Sijun.Du@tudelft.nlYou should be familiar with analog IC design and Cadence environment. If you are interested, please send your CV, BSc transcripts and MSc grades (obtained to date) to Sijun Du at email: Sijun.Du@tudelft.nl
dr. Sijun Du
Electronic Instrumentation Group
Department of Microelectronics
Last modified: 2022-01-06