Broadband frequency dependent calibration (NXP)

Broadband oversampled data converters sampled beyond 10GHz can achieve an input signal bandwidth in excess of 1GHz. However, circuit non idealities such as timing mismatch within the multi-bit ADC/DAC units and limited gain bandwidth of amplifiers limit the maximum achievable SNDR and linearity below 60dB. This project focuses on mixed-signal frequency dependent calibration techniques targeting broadband data converters.

In this master thesis project you will do/learn

• In depth study of ADC (or DAC) architecture
• Design of analog and mixed-signal circuits in 28nm CMOS
• Circuit simulations with Spectre (or other simulator)
• Layout design of circuits and simulation of extracted layout
• Build understanding of impact of process imperfections and parasitic artifacts on performance

A stipend is provided.

Assignment

Overview of the project planning (depending on the progress of the student)

• Literature review of the data converter (ADC & DAC) calibration techniques.
• System level study of the proposed ADC architecture in Matlab/Cadence.
• Circuit and layout implementation.
• Tape-out of the IC followed by measurement.
• Process node: 28nm HPCP.
• Depending on implementation a possible target tape-out date: June 2025

Requirements

• Good knowledge of analog and mixed circuit design.
• Good understanding of Data Converters.
• Familiarity with Matlab and Cadence.
• You will be collaborating with researchers from NXP Semiconductors so good communication and presentation skills are essential.

Contact

Last modified: 2024-02-07